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LT1949 600kHz, 1A Switch PWM DC/DC Converter
FEATURES
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DESCRIPTIO
1A, 0.5, 30V Internal Switch Operates with VIN as Low as 1.5V 600kHz Fixed Frequency Operation Low-Battery Detector Stays Active in Shutdown Low VCESAT Switch: 410mV at 800mA Pin-for-Pin Compatible with the LT1317B Small 8-Lead MSOP and SO Packages
APPLICATIO S
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LCD Bias Supplies GPS Receivers Battery Backup Portable Electronic Equipment Diagnostic Medical Instrumentation
The LT (R)1949 is a fixed frequency step-up DC/DC converter with a 1A, 0.5 internal switch. Capable of generating 10V at 175mA from a 3.3V input, the LT1949 is ideal for generating bias voltages for large screen LCD panels. Constant frequency 600kHz operation results in a low noise output that is easy to filter and the 30V switch rating allows output voltage up to 28V using a single inductor. An external compensation pin gives the user flexibility in optimizing loop compensation, allowing small low ESR ceramic capacitors to be used at the output. The 8-lead MSOP and SO packages ensure a low profile overall solution. The LT1949 includes a low-battery detector that stays alive when the device goes into shutdown. Quiescent current in shutdown is 25A, while operating current is 4.5mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
VIN 3.3V L1 10H
90 D1 80 SW 70 3.6VIN 4.2VIN 3VIN VOUT = 10V
+
C1 22F
VIN LT1949
SHUTDOWN
SHDN VC 68k 330pF
FB GND R2 140k
VOUT 10V 175mA C2 10F CERAMIC
EFFICIENCY (%)
R1 1M
60 50 40 30
C1: AVX TAJA226M006R C2: TAIYO YUDEN LMK325BJ106MN D1: MBRM120LT3 L1: SUMIDA CDRH62B-100
1949 F01
20 5 10 50 100 LOAD CURRENT (mA) 300
1949 F02
Figure 1. 3.3V to 10V/175mA DC/DC Converter
Figure 2. 3.3V to 10V Converter Efficiency
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LT1949
ABSOLUTE AXI U RATI GS
VIN, LBO Voltage ..................................................... 12V SW Voltage ............................................... - 0.4V to 30V FB Voltage .................................................... VIN + 0.3V VC Voltage ................................................................ 2V LBI Voltage ............................................ 0V VLBI 1V SHDN Voltage ........................................................... 6V
PACKAGE/ORDER I FOR ATIO
TOP VIEW VC FB SHDN GND 1 2 3 4 8 7 6 5 LBO LBI VIN SW
ORDER PART NUMBER LT1949EMS8 MS8 PART MARKING LTJC
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 125C, JA = 120C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL IQ VFB IB gm AV PARAMETER Quiescent Current
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 2V, VSHDN = 2V unless otherwise noted.
CONDITIONS VSHDN = 0V Feedback Voltage
q q q
FB Pin Bias Current (Note 3) Input Voltage Range Error Amp Transconductance Error Amp Voltage Gain Maximum Duty Cycle Switch Current Limit (Note 4) VIN = 2.5V, Duty Cycle = 30% VIN = 2.5V, Duty Cycle = 30% VSHDN = VIN VSHDN = 0V I = 5A
fOSC
Switching Frequency Shutdown Pin Current LBI Threshold Voltage
LBO Output Low LBO Leakage Current LBI Input Bias Current (Note 5) Low-Battery Detector Gain Switch Leakage Current
ISINK = 10A VLBI = 250mV, VLBO = 5V VLBI = 150mV 1M Pull-Up VSW = 5V
2
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(Note 1)
Junction Temperature .......................................... 125C Operating Temperature Range (Note 2) LT1949EMS8 .......................................-40C to 85C LT1949ES8/LT1949IS8 .......................-40C to 85C Storage Temperature ........................... - 65C to 150C Lead Temperature (Soldering, 10sec).................. 300C
TOP VIEW VC 1 FB 2 SHDN 3 GND 4 8 7 6 5 LBO LBI VIN SW
ORDER PART NUMBER LT1949ES8 LT1949IS8 S8 PART MARKING 1949E 1949I
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 120C/W
MIN
TYP 4.5 25
MAX 7.5 40 1.26 1.26 80 12 240
UNITS mA A V V nA V mhos V/V %
1.22 1.20 1.7 70 80 1 0.95 500
1.24 1.24 12 140 700 85 1.13 600 0.015 - 2.3
q q q
q q q q q q q q q
1.5 1.5 750 0.1 -7 210 220 0.25 0.1 60 3
A A kHz A A mV mV V A nA V/V A
190 180
200 200 0.15 0.02 5 2000 0.01
q
LT1949
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Switch VCESAT Reference Line Regulation SHDN Input Voltage High SHDN Input Voltage Low
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 2V, VSHDN = 2V unless otherwise noted.
CONDITIONS ISW = 800mA ISW = 500mA 1.8V VIN 12V
q q q q
MIN
TYP 410
MAX 400
UNITS mV mV %/V V V
0.08 1.4
0.15 6 0.4
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1949E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: Bias current flows into FB pin. Note 4: Switch current limit guaranteed by design and/or correlation to static tests. Duty cycle affects current limit due to ramp generator. Note 5: Bias current flows out of LBI pin.
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency
700
OSCILLATOR FREQUENCY (kHz)
-40C 25C 600 85C
SWITCH CURRENT (A)
SWITCH CURRENT (A)
650
550
500
0
2
4 6 8 INPUT VOLTAGE
Switch Voltage Drop (VCESAT)
1.0 1.25
QUIESCENT CURRENT (mA)
0.8 85C 25C 0.4 -40C 0.2
FEEDBACK VOLTAGE (V) SWITCH VOLTAGE (V)
0.6
0 0 0.2 0.4 0.6 0.8 SWITCH CURRENT (A) 1.0 1.2
1949 G04
UW
10 12
1949 G01
Switch Current Limit
1.3
Switch Current Limit, Duty Cycle = 30%
1.3
1.2
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8 0 20 60 40 DUTY CYCLE (%) 80 100
1949 G02
0.8 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1949 G03
Feedback Voltage
4.6 4.5
1.24
Quiescent Current, SHDN = 2V
4.4 4.3 4.2 4.1 4.0 3.9
1.23
1.22
1.21
1.20 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1949 G05
3.8 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1949 G06
3
LT1949 TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current, SHDN = 0V
26 25 QUIESCENT CURRENT (A)
FB PIN BIAS CURRENT (nA)
24 23 22 21 20 -50
28 24 20 16 12 8 4
SHDN PIN CURRENT (A)
-25
0 25 50 TEMPERATURE (C)
Load Regulation
VOUT 50mV/DIV DC COUPLED OFFSET ADDED VOUT 50mV/DIV DC COUPLED OFFSET ADDED
ILOAD 25mA/DIV VIN = 3V VOUT = 10V L1 = 10H, SUMIDA CD54 COUT = 10F CERAMIC
PI FU CTIO S
VC (Pin 1): Compensation Pin for Error Amplifier. Connect a series RC network from this pin to ground. Typical values for compensation are a 68k/330pF combination when using ceramic output capacitors. Minimize trace area at VC. FB (Pin 2): Feedback Pin. Reference voltage is 1.24V. Connect resistor divider tap here. Minimize trace area at FB. Set VOUT according to: VOUT = 1.24V(1 + R1/R2). SHDN (Pin 3): Shutdown. Pull this pin low for shutdown mode (only the low-battery detector remains active). Leave this pin floating or tie to a voltage between 1.4V and 6V to enable the device. SHDN pin is logic level and need only meet the logic specification (1.4V for high, 0.4V for low). GND (Pin 4): Ground. Connect directly to local ground plane. SW (Pin 5): Switch Pin. Connect inductor/diode here. Minimize trace area at this pin to keep EMI down. VIN (Pin 6): Supply Pin. Must be bypassed close to the pin. LBI (Pin 7): Low-Battery Detector Input. 200mV reference. Voltage on LBI must stay between ground and 700mV. Low-battery detector remains active in shutdown mode. LBO (Pin 8): Low-Battery Detector Output. Open collector, can sink 10A. A 1M pull-up is recommended.
4
UW
75
1317 TPC10
FB Pin Bias Current
40 36 32
SHDN Pin Current
2
1
0
-1
-2
100
0 -50
-3
-25 0 25 50 TEMPERATURE (C) 75 100
0
1
2 4 3 SHDN PIN VOLTAGE (V)
5
6
1317 TPC12
1317 TPC11
Load Regulation
VOUT 100mV/DIV AC COUPLED IL 500mA/DIV ILOAD 200mA 100mA ILOAD 50mA/DIV VIN = 4V VOUT = 10V L1 = 10H, SUMIDA CD54 COUT = 10F CERAMIC
Transient Response
50s/DIV VIN = 3.3V VOUT = 10V CIRCUIT OF FIGURE 1
1949 G11
1949 G12
1949 G10
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LT1949
BLOCK DIAGRA
1.24V REFERENCE
VOUT BIAS R1 (EXTERNAL) FB RAMP GENERATOR
600kHz OSCILLATOR
Figure 3. LT1949 Block Diagram
OPERATIO
The LT1949 is a current mode, fixed frequency step-up DC/DC converter with an internal 1A NPN power transistor. Operation can best be understood by referring to the Block Diagram. At the beginning of each oscillator cycle, the flip-flop is set and the switch is turned on. Current in the switch ramps up until the voltage at A2's positive input reaches the VC pin voltage, causing A2's output to change state and the switch to be turned off. The signal at A2's positive input is a summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%). If the load increases, VOUT (and FB) will drop slightly and the error amplifier will drive VC to a higher voltage, causing current in the switch to increase. In this way, the error amplifier drives the VC pin to the voltage necessary to satisfy the load. Frequency compensation is provided by an external series RC network connected between the VC pin and ground.
+
+ +
-
R2 (EXTERNAL)
W
LBI
+
FB 2 gm
VC 1 200mV ENABLE
7
+ -
A4
LBO 8
-
ERROR AMPLIFIER
+ -
SHDN SHUTDOWN 3
A1 COMPARATOR SW 5 FF R A2 COMPARATOR S Q DRIVER Q3
+
A=2 0.06
-
4 GND
1949 BD
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Layout Hints The LT1949 switches current at high speed, mandating careful attention to layout for proper performance. You will not get advertised performance with careless layouts. Figure 4 shows recommended component placement for a boost (step-up) converter. Follow this closely in your PC layout. Note the direct path of the switching loops. Input capacitor C1 must be placed close (< 5mm) to the IC package. As little as 10mm of wire or PC trace from CIN to VIN will cause problems such as inability to regulate or oscillation. The ground terminal of output capacitor C2 should tie close to Pin 4 of the LT1949. Doing this reduces dI/dt in the ground copper which keeps high frequency spikes to a minimum. The DC/DC converter ground should tie to the PC board ground plane at one place only, to avoid introducing dI/dt in the ground plane.
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LT1949
OPERATIO
APPLICATIONS INFORMATION
Low-Battery Detector The LT1949's low-battery detector is a simple PNP input gain stage with an open collector NPN output. The negative input of the gain stage is tied internally to a 200mV 5% reference. The positive input is the LBI pin. Arrangement as a low-battery detector is straightforward.
3.3V R1 LBI R2 100k VIN LT1949 1M LBO
200k VIN LBO LT1949
+ -
200mV INTERNAL REFERENCE GND
1949 F05
TO PROCESSOR
V - 200mV R1 = LB 2A
Figure 5. Setting Low-Battery Detector Trip Point
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GROUND PLANE LBI LBO C1
+
VIN
1 R1 2 R2 SHUTDOWN 3 4 MULTIPLE VIAs GND C2 LT1949
8 7 6 5 L1
VOUT
1949 F04
Figure 4. Recommended Component Placement for Boost Converter. Note Direct High Current Paths Using Wide PC Traces. Minimize Trace Area at Pin 1 (VC) and Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground Plane. Use Vias at One Location Only to Avoid Introducing Switching Currents into the Ground Plane
Figure 5 details hookup. R1 and R2 need only be low enough in value so that the bias current of the LBI pin doesn't cause large errors. For R2, 100k is adequate. The 200mV reference can also be accessed as shown in Figure 6. The low-battery detector remains active in shutdown.
2N3906 VREF 200mV 10k
+
10F
LBI GND
1949 F06
Figure 6. Accessing 200mV Reference
LT1949
TYPICAL APPLICATIO
VIN 4V TO 9V 1M C1 4.7F 16V 1M VIN
PACKAGE DESCRIPTIO
0.007 (0.18) 0.021 0.006 (0.53 0.015)
0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) BSC 0.193 0.006 (4.90 0.15) 0.118 0.004** (3.00 0.102)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 - 0.050 (0.406 - 1.270)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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4 Cell to 5V SEPIC Converter
L1 10H C2 4.7F 16V D1 VOUT 5V 250mA 1M 1% C3 10F 6.3V 332k 1% C1, C2: TAIYO YUDEN EMK316BJ475ML C3: TAIYO YUDEN JMK316BJ106ML D1: MOTOROLA MBRM120LT3 L1, L2: SUMIDA CR32-100KC
1949 TA02
SW LT1949
L2 10H
SHDN VC 33k 3.3nF
FB GND
Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102)
0.040 0.006 (1.02 0.15)
0.034 0.004 (0.86 0.102)
8
76
5
0.006 0.004 (0.15 0.102)
MSOP (MS8) 1098
1
23
4
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 0.053 - 0.069 (1.346 - 1.752) 8 0.004 - 0.010 (0.101 - 0.254) 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 7 6 5
0.050 (1.270) BSC
SO8 1298
1
2
3
4
7
LT1949
TYPICAL APPLICATIO
VIN 3.3V VIN SHUTDOWN SHDN LBI C1 22F LB0 VC
+
C1: AVX TAJB226M010 C2: TAIYO YUDEN TMK432BJ106MN X7R 1210 C4, C5, C6: TAIYO YUDEN LMK316BJ475ML X5R1206 C7, C8, C9: 0.1F CERAMIC, 50V D1 TO D6: FMMD7000, DUAL DIODE D7: MBRM120LT3 L1: SUMIDA CDRH62B-100
RELATED PARTS
PART NUMBER LT1054 LT1302 LT1304 LT1307B LT1308B LT1317B LTC(R)1516 LT1613 LTC1682 LTC1754 DESCRIPTION High Power Regulated Charge Pump High Output Current Micropower DC/DC Converter 2-Cell Micropower DC/DC Converter Single Cell Micropower 600kHz PWM DC/DC Converter 2A 600kHz PWM DC/DC Converter Micropower, 600kHz PWM DC/DC Converter 2-Cell to 5V Regulated Charge Pump Single Cell 1.4MHz PWM DC/DC Converter Doubler Charge Pump with Low Noise Linear Regulator Micropower 3.3V/5V Charge Pump with Shutdown COMMENTS Up to 100mA Output with No Inductors 5V/600mA from 2V, 2A Internal Switch, 200A IQ Low-Battery Detector Active in Shutdown 3.3V at 75mA from 1 Cell, MSOP Package TSSOP Package 2 Cells to 3.3V at 200mA, MSOP Package 12A IQ, No Inductors, 5V at 50mA from 3V Input 3.3V to 5V at 200mA, SOT-23 Package 3.3V and 5V Outputs with 60VRMS Noise, Up to 80mA Output Up to 50mA Output, IQ = 13A, SOT-23 Package
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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Low Profile Triple Output LCD Bias Generator
D1 D2 D3 D4 23V 5mA C7 0.1F C8 0.1F C9 0.1F L1 10H D7 8V 200mA SW LT1949 FB GND R1 47k C3 680pF C6 4.7F R3 7.5k 1% C2 10F C4 4.7F R2 40.2k 1% D5 C5 4.7F D6 -8V 10mA
1949 TA01
1949f LT/TP 0300 4K * PRINTED IN THE USA
(c) LINEAR TECHNOLOGY CORPORATION 1999

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